{"product_id":"robot-driver-board","title":"Robot Driver Board Designed for Arduino Uno","description":"\u003ch1\u003eArduino Uno Robot Driver Board\u003c\/h1\u003e\n\u003cp\u003eThis driver board is designed for use with XGO-Duck.\u003c\/p\u003e\n\u003cp\u003eVersion: V1.0 · Schematic Interpretation Edition · 2026-09-28\u003c\/p\u003e\n\u003ch2\u003e1. Product Overview\u003c\/h2\u003e\n\u003cp\u003eThis design is an expansion carrier board that connects to an external controller board through H1–H4 pin headers. The current schematic contains no MCU, processor, or wireless module; program execution, USB downloading, networking, and similar functions are provided by the external controller board.\u003c\/p\u003e\n\u003cp\u003eMain features:\u003c\/p\u003e\n\u003cul\u003e\n\u003cli\u003eExternal DC power input and slide-switch control.\u003c\/li\u003e\n\u003cli\u003eConversion of the external supply into on-board 5 V and 3.3 V rails.\u003c\/li\u003e\n\u003cli\u003eA QMI8658A six-axis inertial sensor that provides acceleration and angular-velocity data over I²C.\u003c\/li\u003e\n\u003cli\u003eConversion of the controller UART TX and RX lines into one half-duplex SIGNAL bus.\u003c\/li\u003e\n\u003cli\u003eSix three-wire ports connected in parallel, exposing GND, power, and SIGNAL for bus devices with compatible electrical characteristics and protocols.\u003c\/li\u003e\n\u003cli\u003eTwo power LEDs: one for the post-switch supply and one for the on-board 5 V rail.\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003cp\u003e\u003cstrong\u003eAll six ports share one bus; they are not six independent UARTs or six independent PWM channels. The board also has no power bridge for directly driving bare motors.\u003c\/strong\u003e\u003c\/p\u003e\n\u003ch2\u003e2. Functional and Power Block Diagram\u003c\/h2\u003e\n\u003cpre\u003e\u003ccode\u003eCN1 \/ DC1 external DC input (both connected in parallel to Power)\n                   │\n                  SW1\n                   │\n                VCC8.4V ─────→ Pin 2 of the six bus ports\n                   ├─────────→ Pin 1 of H3\n                   ├─────────→ D4 power indicator\n                   │\n             U2: H7651-50PR (linear regulator)\n                   │\n                 VCC5V ──────→ D3 power indicator\n                   │\n             Q2: AMS1117-3.3V (linear regulator)\n                   │\n                 VDD3V3 ─────→ QMI8658A, transceiver buffers, signal pull-up\n\nH4.2 \/ TX0 ──→ Automatic direction control and transmit buffer ──→ SIGNAL\nH4.1 \/ RX0 ←── Receive buffer ←────────────────────────────────── SIGNAL\nH2.9 \/ SDA, H2.10 \/ SCL ←──── I²C ────→ QMI8658A\n\u003c\/code\u003e\u003c\/pre\u003e\n\u003cp\u003eVCC8.4V is a net name that expresses the design intent; it does not mean that this point has a precisely regulated 8.4 V output. It is the external input voltage after SW1.\u003c\/p\u003e\n\u003ch2\u003e3. Power Input and Switch\u003c\/h2\u003e\n\u003ch3\u003e3.1 Input Connectors\u003c\/h3\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003eReference\u003c\/th\u003e\n\u003cth\u003eSchematic part number\u003c\/th\u003e\n\u003cth\u003ePin\u003c\/th\u003e\n\u003cth\u003eConnection\u003c\/th\u003e\n\u003cth\u003ePurpose\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003eCN1\u003c\/td\u003e\n\u003ctd\u003eZX-XH2.54-2PWZ\u003c\/td\u003e\n\u003ctd\u003e1\u003c\/td\u003e\n\u003ctd\u003ePower\u003c\/td\u003e\n\u003ctd\u003eExternal DC positive terminal\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eCN1\u003c\/td\u003e\n\u003ctd\u003eSame as above\u003c\/td\u003e\n\u003ctd\u003e2\u003c\/td\u003e\n\u003ctd\u003eGND\u003c\/td\u003e\n\u003ctd\u003eExternal DC negative terminal\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDC1\u003c\/td\u003e\n\u003ctd\u003eKH-DC-007B-2.1G\u003c\/td\u003e\n\u003ctd\u003e4\u003c\/td\u003e\n\u003ctd\u003ePower\u003c\/td\u003e\n\u003ctd\u003ePositive supply terminal defined by the schematic\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDC1\u003c\/td\u003e\n\u003ctd\u003eSame as above\u003c\/td\u003e\n\u003ctd\u003e2, 3\u003c\/td\u003e\n\u003ctd\u003eGND\u003c\/td\u003e\n\u003ctd\u003eGround terminals\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003cp\u003eVerify the pin numbering of DC1 against the purchased part, footprint drawing, and continuity of the physical connector before determining the inner\/outer plug polarity. Do not infer it from common DC-jack conventions alone.\u003c\/p\u003e\n\u003cp\u003e\u003cstrong\u003eCN1 and DC1 are directly connected in parallel; there is no power-priority selection or isolation circuit between the two inputs. TPS2116 is not used in this version. In normal use, power the board through one input connector only; do not connect two independent supplies at the same time.\u003c\/strong\u003e\u003c\/p\u003e\n\u003ch3\u003e3.2 SW1 Switch\u003c\/h3\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003eSW1 pin\u003c\/th\u003e\n\u003cth\u003eNet\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003e1\u003c\/td\u003e\n\u003ctd\u003eNot connected in the current schematic\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e2 (common)\u003c\/td\u003e\n\u003ctd\u003eVCC8.4V\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e3\u003c\/td\u003e\n\u003ctd\u003ePower\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003cp\u003eWhen pins 2 and 3 are connected, Power is fed to VCC8.4V. When pins 2 and 1 are connected, this power path is disconnected. The actual ON\/OFF direction depends on the installation orientation.\u003c\/p\u003e\n\u003cp\u003eSW1 controls the external-input path described above. If the external controller board is powered through USB or another interface, turning this switch off does not necessarily mean that the entire system is unpowered.\u003c\/p\u003e\n\u003ch3\u003e3.3 On-board Regulation and LEDs\u003c\/h3\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003eModule\u003c\/th\u003e\n\u003cth\u003eInput → output\u003c\/th\u003e\n\u003cth\u003eRelated components\u003c\/th\u003e\n\u003cth\u003eDescription\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003eU2: H7651-50PR\u003c\/td\u003e\n\u003ctd\u003eVCC8.4V → VCC5V\u003c\/td\u003e\n\u003ctd\u003eC7 1 µF, C6 6.8 µF\u003c\/td\u003e\n\u003ctd\u003e5 V linear regulator\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eQ2: AMS1117-3.3V\u003c\/td\u003e\n\u003ctd\u003eVCC5V → VDD3V3\u003c\/td\u003e\n\u003ctd\u003eC8\/C10 10 µF, C9\/C11 100 nF\u003c\/td\u003e\n\u003ctd\u003e3.3 V linear regulator; although it uses a Q reference designator, Q2 is a regulator IC\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eD4\u003c\/td\u003e\n\u003ctd\u003eVCC8.4V → R11 20 kΩ → LED → GND\u003c\/td\u003e\n\u003ctd\u003eLED\/resistor\u003c\/td\u003e\n\u003ctd\u003ePost-switch power indicator\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eD3\u003c\/td\u003e\n\u003ctd\u003eVCC5V → R5 10 kΩ → LED → GND\u003c\/td\u003e\n\u003ctd\u003eLED\/resistor\u003c\/td\u003e\n\u003ctd\u003eOn-board 5 V indicator\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003cp\u003eThe LEDs show only that their respective power rails are present. They do not demonstrate voltage accuracy, load capability, or correct software operation.\u003c\/p\u003e\n\u003cp\u003eThe H7651 product table lists an 8.5 V voltage specification, which is close to the 8.4 V supply naming used in this schematic. Therefore, this board must not be treated as a general-purpose 9 V\/12 V input board. The complete allowable input range must be confirmed using the specific IC documentation, supply tolerance, surge conditions, and load testing. [Reference S1]\u003c\/p\u003e\n\u003cp\u003eLinear-regulator dissipation is approximately P = (Vin − Vout) × I. For example, dropping 8.4 V to 5 V dissipates about 0.34 W at 100 mA and about 1.7 W at 500 mA. A 1 A device rating does not mean that this board can continuously provide 1 A: sustained current depends on package, PCB thermal performance, and ambient temperature. A 3.3 V load also consumes part of the upstream 5 V regulator’s current budget.\u003c\/p\u003e\n\u003cp\u003eThe bus-device supply comes directly from VCC8.4V, bypassing U2. Its total current remains limited by the input connector, SW1, connectors, and PCB traces; the available information is insufficient to specify a board-wide current rating. This schematic shows no reverse-polarity protection, fuse, battery charger, or battery-protection circuit.\u003c\/p\u003e\n\u003ch2\u003e4. External Interface Definitions\u003c\/h2\u003e\n\u003cp\u003eAll pin numbers in this section are schematic pin numbers. They are not necessarily the left-to-right order when viewing the physical board. Check the PCB’s pin-1 marking before connecting anything.\u003c\/p\u003e\n\u003ch3\u003e4.1 Six Bus-Device Ports\u003c\/h3\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003eReference\u003c\/th\u003e\n\u003cth\u003eSchematic part\/type\u003c\/th\u003e\n\u003cth\u003ePin 1\u003c\/th\u003e\n\u003cth\u003ePin 2\u003c\/th\u003e\n\u003cth\u003ePin 3\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003eP1, P2, P3\u003c\/td\u003e\n\u003ctd\u003eHeader 3; exact socket type determined by assembly\u003c\/td\u003e\n\u003ctd\u003eGND\u003c\/td\u003e\n\u003ctd\u003eVCC8.4V\u003c\/td\u003e\n\u003ctd\u003eSIGNAL\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eU3, U4, U5\u003c\/td\u003e\n\u003ctd\u003e292253-3, three-pin connector\u003c\/td\u003e\n\u003ctd\u003eGND\u003c\/td\u003e\n\u003ctd\u003eVCC8.4V\u003c\/td\u003e\n\u003ctd\u003eSIGNAL\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003cp\u003eLike-named pins on all six ports are connected fully in parallel. Although U3–U5 use U reference designators, they are connectors, not driver ICs.\u003c\/p\u003e\n\u003cul\u003e\n\u003cli\u003eSIGNAL is driven by 3.3 V logic and pulled up to VDD3V3 through R8 (10 kΩ).\u003c\/li\u003e\n\u003cli\u003eConnected devices must support the corresponding single-wire half-duplex communication method. Verify their logic-high threshold and return-signal voltage.\u003c\/li\u003e\n\u003cli\u003eSIGNAL is not an RS-485, CAN, or RS-232 electrical interface and must not be connected directly to any of those interfaces.\u003c\/li\u003e\n\u003cli\u003eWhen multiple devices share the bus, the protocol must support distinct addresses\/IDs and prevent simultaneous device responses.\u003c\/li\u003e\n\u003cli\u003eThe bus ports are not general-purpose three-wire PWM-servo ports; three wires alone do not establish compatibility.\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003ch3\u003e4.2 Headers Connecting to the Controller Board\u003c\/h3\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003eHeader\u003c\/th\u003e\n\u003cth\u003ePin\u003c\/th\u003e\n\u003cth\u003eCurrent schematic connection\u003c\/th\u003e\n\u003cth\u003eController-side purpose\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003eH1 (6-pin)\u003c\/td\u003e\n\u003ctd\u003e1–6\u003c\/td\u003e\n\u003ctd\u003eNot connected\u003c\/td\u003e\n\u003ctd\u003eUnused by the current carrier board\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH2 (10-pin)\u003c\/td\u003e\n\u003ctd\u003e1–6\u003c\/td\u003e\n\u003ctd\u003eNot connected\u003c\/td\u003e\n\u003ctd\u003eUnused by the current carrier board\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH2\u003c\/td\u003e\n\u003ctd\u003e7\u003c\/td\u003e\n\u003ctd\u003eGND\u003c\/td\u003e\n\u003ctd\u003eCommon ground\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH2\u003c\/td\u003e\n\u003ctd\u003e8\u003c\/td\u003e\n\u003ctd\u003eNot connected\u003c\/td\u003e\n\u003ctd\u003eUnused by the current carrier board\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH2\u003c\/td\u003e\n\u003ctd\u003e9\u003c\/td\u003e\n\u003ctd\u003eSDA\u003c\/td\u003e\n\u003ctd\u003eI²C data\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH2\u003c\/td\u003e\n\u003ctd\u003e10\u003c\/td\u003e\n\u003ctd\u003eSCL\u003c\/td\u003e\n\u003ctd\u003eI²C clock\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH3 (8-pin)\u003c\/td\u003e\n\u003ctd\u003e1\u003c\/td\u003e\n\u003ctd\u003eVCC8.4V\u003c\/td\u003e\n\u003ctd\u003eExternal input after the switch is supplied to the controller board; the controller-side terminal must be verified to accept this voltage\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH3\u003c\/td\u003e\n\u003ctd\u003e2, 3\u003c\/td\u003e\n\u003ctd\u003eGND\u003c\/td\u003e\n\u003ctd\u003eCommon ground\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH3\u003c\/td\u003e\n\u003ctd\u003e4–8\u003c\/td\u003e\n\u003ctd\u003eNot connected\u003c\/td\u003e\n\u003ctd\u003eUnused by the current carrier board\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH4 (8-pin)\u003c\/td\u003e\n\u003ctd\u003e1\u003c\/td\u003e\n\u003ctd\u003eRX0\u003c\/td\u003e\n\u003ctd\u003eController UART receive input\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH4\u003c\/td\u003e\n\u003ctd\u003e2\u003c\/td\u003e\n\u003ctd\u003eTX0\u003c\/td\u003e\n\u003ctd\u003eController UART transmit output\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eH4\u003c\/td\u003e\n\u003ctd\u003e3–8\u003c\/td\u003e\n\u003ctd\u003eNot connected\u003c\/td\u003e\n\u003ctd\u003eUnused by the current carrier board\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003cp\u003eThe current SchDoc does not connect on-board VCC5V or VDD3V3 to any other pins of H1–H4. “Not connected” means it is not connected to circuitry on this carrier board; it does not mean that the corresponding positions have no function on the external controller board.\u003c\/p\u003e\n\u003cp\u003e\u003cstrong\u003eAlthough the file name includes ArduinoUnoQ, this schematic does not provide the controller-side pin names, processor port numbers, or power specifications. Do not directly apply UNO R3, UNO Q, or other controller-board D0\/D1 or VIN mappings merely based on header appearance. The connector definition for the corresponding controller board must be supplied during development.\u003c\/strong\u003e\u003c\/p\u003e\n\u003ch2\u003e5. Single-Wire Half-Duplex Communication Circuit\u003c\/h2\u003e\n\u003ch3\u003e5.1 Component Roles\u003c\/h3\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003eComponent\u003c\/th\u003e\n\u003cth\u003eFunction\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003eSN1: SN74LVC1G126\u003c\/td\u003e\n\u003ctd\u003eTX0 → SIGNAL; enabled when OE is high\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eSN2: SN74LVC1G125\u003c\/td\u003e\n\u003ctd\u003eSIGNAL → RX0; enabled when \/OE is low\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eQ1: BC807\u003c\/td\u003e\n\u003ctd\u003ePNP transistor that generates TXEN according to the TX0 level\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eR9: 1 kΩ\u003c\/td\u003e\n\u003ctd\u003eQ1 base-current limiting\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eR10: 3.3 kΩ\u003c\/td\u003e\n\u003ctd\u003eTXEN pull-down\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eR8: 10 kΩ\u003c\/td\u003e\n\u003ctd\u003eSIGNAL pull-up to 3.3 V\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eC5: 100 nF\u003c\/td\u003e\n\u003ctd\u003ePower decoupling\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003cp\u003eThe enable polarities of SN1 and SN2 are based on the TI datasheets. [References S2, S3]\u003c\/p\u003e\n\u003ch3\u003e5.2 Automatic Direction-Control Operation\u003c\/h3\u003e\n\u003cp\u003eWith the existing connections, the logic operates as follows (propagation delay ignored):\u003c\/p\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003eController TX0\u003c\/th\u003e\n\u003cth\u003eQ1 \/ TXEN\u003c\/th\u003e\n\u003cth\u003eSN1 transmit path\u003c\/th\u003e\n\u003cth\u003eSN2 receive path\u003c\/th\u003e\n\u003cth\u003eSIGNAL behavior\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003eLow\u003c\/td\u003e\n\u003ctd\u003eQ1 on, TXEN high\u003c\/td\u003e\n\u003ctd\u003eEnabled; drives low\u003c\/td\u003e\n\u003ctd\u003eHigh impedance\u003c\/td\u003e\n\u003ctd\u003eThe controller actively pulls the bus low\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eHigh\u003c\/td\u003e\n\u003ctd\u003eQ1 off; R10 pulls TXEN low\u003c\/td\u003e\n\u003ctd\u003eHigh impedance\u003c\/td\u003e\n\u003ctd\u003eEnabled\u003c\/td\u003e\n\u003ctd\u003eThe bus is released and pulled high by R8; peripherals may respond\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003cp\u003eTXEN is therefore generated on-board and \u003cstrong\u003eis not brought out to a controller GPIO through the headers\u003c\/strong\u003e. This version does not require software to control a separate TXEN pin.\u003c\/p\u003e\n\u003cp\u003eThe controller should use standard UART polarity, with the idle state high. Once transmission ends, keep TX0 high to release the bus and receive a peripheral response. Baud rate, parity, frame format, addressing, response delay, and checksum are not defined in the schematic and must be configured according to the target device protocol.\u003c\/p\u003e\n\u003cp\u003eWhile a low bit is being transmitted, the RX0 buffer is high impedance. The controller RX input should be configured with an appropriate pull-up; software must not assume it will always receive a complete and accurate echo of its own transmission. Confirm the specific MCU input configuration against its port specifications.\u003c\/p\u003e\n\u003cp\u003eBecause the high level is established mainly by a 10 kΩ pull-up, bus capacitance, cable length, and the number of devices affect the rising edge. Confirm the maximum usable baud rate with an oscilloscope using the actual cable harness and load; do not infer it solely from the buffer IC speed.\u003c\/p\u003e\n\u003ch2\u003e6. QMI8658A Six-Axis Sensor\u003c\/h2\u003e\n\u003cp\u003eU1 measures three-axis acceleration and three-axis angular velocity. It can be used for attitude estimation, tilt detection, motion recognition, and vibration monitoring. A six-axis sensor has no magnetometer; sustained absolute-heading estimation needs an additional reference, and long-term heading drift cannot be eliminated using only six-axis data.\u003c\/p\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003eU1 pin\u003c\/th\u003e\n\u003cth\u003eCurrent connection\u003c\/th\u003e\n\u003cth\u003eFunction\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003e14 SDA\u003c\/td\u003e\n\u003ctd\u003eSDA → H2.9; R2 4.7 kΩ pull-up to 3.3 V\u003c\/td\u003e\n\u003ctd\u003eI²C data\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e13 SCL\u003c\/td\u003e\n\u003ctd\u003eSCL → H2.10; R3 4.7 kΩ pull-up to 3.3 V\u003c\/td\u003e\n\u003ctd\u003eI²C clock\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e12 CS\u003c\/td\u003e\n\u003ctd\u003eR4 4.7 kΩ pull-up to 3.3 V\u003c\/td\u003e\n\u003ctd\u003eI²C operating mode\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e1 SDO\/SA0\u003c\/td\u003e\n\u003ctd\u003eR1 10 kΩ pull-up to 3.3 V\u003c\/td\u003e\n\u003ctd\u003eAddress selection; corresponding 7-bit address: 0x6A\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e5 VDDIO, 8 VDD\u003c\/td\u003e\n\u003ctd\u003eVDD3V3\u003c\/td\u003e\n\u003ctd\u003eDigital-interface and IC power\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e6, 7 GND\u003c\/td\u003e\n\u003ctd\u003eGND\u003c\/td\u003e\n\u003ctd\u003eGround\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e4 INT1, 9 INT2\u003c\/td\u003e\n\u003ctd\u003eNot connected\u003c\/td\u003e\n\u003ctd\u003eHardware interrupts cannot currently be provided directly to the controller\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e2, 3, 10, 11\u003c\/td\u003e\n\u003ctd\u003eNot connected\u003c\/td\u003e\n\u003ctd\u003eNot used as external interfaces on this carrier board\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003cp\u003eThe 0x6A address is determined from the definition of SA0 high in QST QMI8658A Rev A. Verify it during development by performing an I²C scan and reading the device ID. [Reference S4]\u003c\/p\u003e\n\u003cp\u003eC1\/C2 and C3\/C4 respectively form supply filtering\/decoupling combinations. Firmware can read data by polling: initialize I²C → confirm the identification register → set range and output data rate → read raw data → convert according to the selected range → perform bias calibration and coordinate transformation.\u003c\/p\u003e\n\u003cp\u003eThe schematic library labels pins 10 and 11 as CS-AUX and SDO-AUX, whereas the QST Rev A pinout labels them RESV and RESV-NC. Before production, confirm reserved-pin requirements for the actual purchased version; do not treat the library names as available expansion functions. The sensor mounting direction and mapping to robot coordinate axes must likewise be confirmed from the PCB and physical hardware.\u003c\/p\u003e\n\u003ch2\u003e7. First Power-Up and Development Procedure\u003c\/h2\u003e\n\u003col\u003e\n\u003cli\u003e\n\u003cstrong\u003eVerify the controller board and headers.\u003c\/strong\u003e Confirm that H3.1 corresponds to a controller-board power terminal that accepts external power; confirm the UART directions at H4.1\/H4.2 and the I²C mapping at H2.9\/H2.10. Confirm that controller logic is compatible with this board’s 3.3 V signals.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eDo not connect motors or bus devices yet.\u003c\/strong\u003e Use only one external input and set the supply current limit to a low value appropriate for no-load debugging. Select the input voltage according to the allowable range of the final components and controller board; do not use an unverified 9 V\/12 V adapter.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eTurn on SW1 and measure.\u003c\/strong\u003e Check Power, VCC8.4V, VCC5V, and VDD3V3. Under normal conditions, the latter two should be close to 5 V and 3.3 V. Check regulator temperature rise and D3\/D4.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eVerify the IMU.\u003c\/strong\u003e Initialize the I²C controller actually mapped on the controller board, confirm acknowledgment at 0x6A, then read the ID and configure sampling parameters. Because INT is not connected, use polling first.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eVerify one bus device.\u003c\/strong\u003e Power off before wiring; verify 1 = GND, 2 = power, 3 = SIGNAL, then power up. Configure the UART according to the device protocol. Start with low-risk commands such as reading status, and confirm normal reception.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eAdd devices one at a time.\u003c\/strong\u003e Configure a different device ID for each device and communicate in request–response order. Check bus waveforms, power-voltage drop, connectors, and regulator temperature rise.\u003c\/li\u003e\n\u003c\/ol\u003e\n\u003cp\u003eSoftware is best divided into three modules: an IMU driver, a UART bus transport layer, and a device-specific protocol layer. The UART instance name and GPIO numbers must be determined from the controller-board mapping; this guide does not directly specify Serial, Serial1, or a particular MCU pin.\u003c\/p\u003e\n\u003ch2\u003e8. Supported Development Features and Current Limits\u003c\/h2\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr\u003e\n\u003cth\u003eFunction\u003c\/th\u003e\n\u003cth\u003eFoundation provided by this board\u003c\/th\u003e\n\u003cth\u003eAdditional requirements\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003eMulti-device addressing; position\/velocity commands\u003c\/td\u003e\n\u003ctd\u003eShared half-duplex UART bus\u003c\/td\u003e\n\u003ctd\u003ePeripheral protocol support and unique device IDs\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDevice-status, temperature, and voltage readback\u003c\/td\u003e\n\u003ctd\u003eRX0 receive path\u003c\/td\u003e\n\u003ctd\u003eThe peripheral must actually provide the relevant commands\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eAttitude display, tilt alarm, motion recognition\u003c\/td\u003e\n\u003ctd\u003eSix-axis IMU + I²C\u003c\/td\u003e\n\u003ctd\u003eSoftware filtering, calibration, and threshold design\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eRobot attitude-feedback control\u003c\/td\u003e\n\u003ctd\u003eIMU and bus actuator interface\u003c\/td\u003e\n\u003ctd\u003eReal-time control program; actuator performance and stability validation\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDamping, rebound, torque control\u003c\/td\u003e\n\u003ctd\u003eCapability to transmit device commands\u003c\/td\u003e\n\u003ctd\u003eThe motor driver must support the corresponding control mode; the carrier board itself does not generate torque control\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eWireless, vision, voice, host-computer communication\u003c\/td\u003e\n\u003ctd\u003eProvided by the external controller board\u003c\/td\u003e\n\u003ctd\u003eController-board hardware and software support\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003cp\u003eThis schematic has no battery-level sensing, charge management, motor-current sensing, independent emergency stop, or per-port power-control circuit. Do not infer that these functions are present from the existing interfaces.\u003c\/p\u003e\n\u003ch2\u003e9. Information to Complete Before Release\u003c\/h2\u003e\n\u003cp\u003eThis guide can be used to understand the interfaces and prepare development. Before it is issued as the final product manual, add the following:\u003c\/p\u003e\n\u003cul\u003e\n\u003cli\u003eExact external controller-board model and revision, header mapping, and allowable input voltage.\u003c\/li\u003e\n\u003cli\u003eVerified complete-board input range, logic-load current, total bus current, and temperature-rise test results.\u003c\/li\u003e\n\u003cli\u003ePower-jack polarity, SW1 direction, port-location photos, and pin-1 orientation.\u003c\/li\u003e\n\u003cli\u003eTarget bus-device model, signal level, protocol, baud rate, and supported maximum device count\/cable length.\u003c\/li\u003e\n\u003cli\u003eActual purchased QMI8658A version, reserved-pin treatment, and installed coordinate axes.\u003c\/li\u003e\n\u003cli\u003eConsistency between the Q2 library’s SOT-89 annotation and the actual purchased AMS1117 part number, package, and pinout, as well as the regulator’s output-capacitor stability requirements.\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003ch2\u003e10. References and Interpretation Method\u003c\/h2\u003e\n\u003cul\u003e\n\u003cli\u003e\n\u003cstrong\u003eS1:\u003c\/strong\u003e \u003ca href=\"https:\/\/www.siproin-ic.com\/product\/\"\u003eShanghai Siproin H7651 product information\u003c\/a\u003e. Used to confirm that it is a linear regulator and the manufacturer-listed parameters; board-level capability still requires testing.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eS2:\u003c\/strong\u003e \u003ca href=\"https:\/\/www.ti.com\/lit\/ds\/symlink\/sn74lvc1g126.pdf\"\u003eTI SN74LVC1G126 datasheet\u003c\/a\u003e.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eS3:\u003c\/strong\u003e \u003ca href=\"https:\/\/www.ti.com\/lit\/ds\/symlink\/sn74lvc1g125.pdf\"\u003eTI SN74LVC1G125 datasheet\u003c\/a\u003e.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eS4:\u003c\/strong\u003e \u003ca href=\"https:\/\/www.qstcorp.com\/upload\/pdf\/202301\/13-52-25%20QMI8658A%20Datasheet%20Rev%20A.pdf\"\u003eQST QMI8658A Rev A datasheet\u003c\/a\u003e.\u003c\/li\u003e\n\u003c\/ul\u003e","brand":"LuwuDynamics","offers":[{"title":"Default Title","offer_id":67594424713467,"sku":null,"price":20.0,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0808\/2361\/5739\/files\/exec-56ff497f-ada8-49cc-b22c-d41cd4d721d8.png?v=1790590079","url":"https:\/\/shop.xgorobot.com\/products\/robot-driver-board","provider":"LuwuDynamics","version":"1.0","type":"link"}